Computers are ubiquitous in today's society. They come in all different varieties and can be found in places such as automobiles, laptops or home personal computers, banks, personal digital assistants, cell phones, as well as many businesses. As such, it is often desirable to improve the efficiency and comprehensiveness of manufacturing testing of computer components. To ensure fast and reliable operation of a computer, manufacturing testing of each part must include some form of speed testing to show that the component is operating within the specified timing parameters.
One common method of circuit testing is known as Automatic Test Pattern Generation (ATPG). In ATPG testing, an input test pattern is scanned into the logic of a digital circuit, a number of clock pulses are issued to advance the state, then the final state is scanned out and compared to an expected output pattern to determine if the logic of the circuit is operating correctly. Generally, there are two types of ATPG testing performed on computer circuits. The first type of ATPG test, known as stuck-bit testing, issues a single clock pulse before scanning out the state and analyzing the result. This type of test is frequently used to determine manufacturing defects of the logic of the circuit which are speed independent. The second type of ATPG test, known as transition test, issues two or more clock pulses at the expected operating frequency of the circuit. This type of test is used frequently to determine if the circuit operates correctly at the frequency of the clock signal. In other words, at-speed transition-testing determines accuracy of the circuit at the anticipated clock frequency for the circuit.
Many microprocessor designs include various domains within the circuit design that utilize different clock signals. For example, the various cores of a microprocessor design may operate on clock signals with different frequencies. Other clock domains within a microprocessor design may include memory interface circuits, input/output interfaces, and crossbars, among others. Because these components or sections of the circuit design may operate on clock frequencies different from other clock domains within the circuit, testing of such clock domains becomes cumbersome. In particular, it is often the case that each clock domain within the microprocessor design is tested individually to ensure that the proper clock signal and frequency is provided to the clock domain during testing. As should be appreciated, testing each clock domain of the circuit separately may exert a cost on the manufacturing phase in the form of both time and processing power.
It is with these and other issues in mind that various aspects of the present disclosure were developed.